参考 CMISI_DAP,BlackMagic代码。
预备下周末结案,目前方案:
1:Host用STM32F427,跑RTEMS系统, IO口模拟SWD时序。
2:flash的操作函数,由Host通过SWD下载入target ram执行。(CMISI_DAP采用这种方式)
不知道jlink的flash操作是不是一样的原理。他要适用这么多芯片,那得有准备多少这样的小程序啊。。。
3:USB用的虚拟串口,用ST官方提供的驱动,上位机编程简单。tafget本身程序.bin文件由上位机通过虚拟串口传入。
此虚拟串口的波特率,奇偶,起停位设置均形同虚设。
目前状态:
SWD时序基本调试通过,读写target ID/reg已经正常,暂时未经过高强度测试。。
正在弄flash操作。
友情提示: 此问题已得到解决,问题已经关闭,关闭后问题禁止继续编辑,回答。
This documentation describe how to programming ARM Cortex M3 internal SRAM over SWD(Serial Wire Debug) interface. For this purpose, something we too know.
SWD communication protocol. We need to know Low level timing requirement, that is foundation to exchange command and data between debugger and target MCU.
Read/write data from/to internal SRAM. We need to know how to program firmware into desired address, like SRAM(0x20000000). That needs us to know SW-DAP registers usage. Pass address and data over those registers and then into internal SRAM.
Make code running from SRAM. We need to change vector table entry from internal flash to SRAM; And SP and PC also needed change to SRAM location. That need us to know the cortex M3 debug and system registers usage.
We choose Silabs SiM3U167 as target MCU in this implementation. We implement a high level protocol with python script, it calls Silabs provided DLL file interface to access Silabs USB Debug Adapter. Also, we provide a firmware running from C8051F380, it contains a full implementation on both low level communicating timing and high level programming SRAM protocol.
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