http://www.edn.com/article/457428-Can_C_beat_RTL_.php
With the appearance of higher speeds and more DSP macrocells in low-cost FPGAs, more and more design teams are seeing the configurable chips not as glue but as a w...
其实是对这张图的理解。
图1: 通道1 是SPISTE信号,通道2是CLK信号,通道3是28035接收到的信号
SPICCR.6 SPICTL.3 = 00(上升沿无延时:The SPI transmits data on the rising edge of the SPICLK signal and
receives data on t...