求教！应用vhdl有关模拟标准ps/2键盘写入数据的时序问题！！！

FPGA

求教！应用vhdl有关模拟标准ps/2键盘写入数据的时序问题！！！

2019-07-15 21:49发布

站内问答 / FPGA

8342 1

写了一个非标准键盘的程序，用ps/2连接FPGA 开发板和电脑，实现在开发板上的矩阵键盘上按个键，然后能在电脑上显示。
下面是我的ps/2模块，请各位大神帮忙看下写出来的时序是对的吗？

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity ps2 is
port(en_in:in std_logic; --按键使能标志
ym_tong:in std_logic_vector(7 downto 0); --按键对应的通码
clk:in std_logic;
clk1:in std_logic;
ps2data:out std_logic;--输出ps2数据
ps2ccclock:out std_logic; --输出ps2时钟
xiaoyan:in std_logic; --校验位
en:buffer std_logic; --按下按键标志
shifangen:buffer std_logic --释放按键标志
);
end ps2;
architecture one of ps2 is
signal cnt:std_logic_vector(3 downto 0);
signal cnt0:std_logic_vector(3 downto 0);
signal cnt1:std_logic_vector(4 downto 0);
signal cnt2:std_logic_vector(4 downto 0);
signal en0,en00,en000:std_logic;
signal shifang0,shifangen00:std_logic;
signal ym_tong1,ym_tong2:std_logic_vector(7 downto 0);
begin
process(en_in)---
begin
if(clk'event and clk='1')then
en0<=en_in;
end if;
end process;
process(clk)---有按键产生时，生成一个按键产生标志en
begin
if(clk'event and clk='1')then
if(en0='0' and en_in='1')then
en<='1';
ym_tong1<=ym_tong;
elsif(cnt="1011")then
en<='0';
else en<=en;
end if;
end if;
end process;
process(clk)---
begin
if(clk'event and clk='1')then
if( en0='0' and en_in='1')then
cnt<="0000";
elsif(cnt="1011")then
cnt<="0000";
else
cnt<=cnt+1;
end if;
end if;
end process;
process(en)
begin
if(clk'event and clk='1')then
en00<=en;
end if;
end process;
process(en)---
begin
if(clk'event and clk='1')then
if(en00='0' and en='1')then
cnt0<="0001";
elsif(en='1')then
if(cnt0<"1100")then
cnt0<=cnt0+1;
else cnt0<="0000";
end if;
end if;
end if;
end process;
process(en_in)
begin
if(clk'event and clk='1')then
shifang0<=en_in;
end if;
end process;
process(clk)--有按键释放时，产生一个释放标志shifangen
begin
if(clk'event and clk='1')then
if(shifang0='1' and en_in='0')then
shifangen<='1';
ym_tong2<=ym_tong;
elsif(cnt1="10110")then
shifangen<='0';
else shifangen<=shifangen;
end if;
end if;
end process;
process(clk)
begin
if(clk'event and clk='1')then
if(shifang0='1' and en_in='0')then
cnt1<="00000";
elsif(cnt1="10110")then
cnt1<="00000";
else
cnt1<=cnt1+1;
end if;
end if;
end process;
process(en)
begin
if(clk'event and clk='1')then
shifangen00<=shifangen;
end if;
end process;
process(shifangen)
begin
if(clk'event and clk='1')then
if(shifangen00='0' and shifangen='1')then
cnt2<="00001";
elsif(shifangen='1')then
if(cnt2<"10111")then cnt2<=cnt2+1;
else cnt2<="00000";
end if;
end if;
end if;
end process;
process(clk1)---产生ps2时钟
begin
if(clk1'event and clk1='1')then
if((en00='0'and en='1') or (shifangen00='0' and shifangen='1'))then
ps2ccclock<='1';
elsif(en='1'or shifangen='1')then
ps2ccclock<=clk;
else ps2ccclock<='1';
end if;
end if;
end process;
process(cnt0,cnt2)--写入数据
begin
if(clk'event and clk='0')then
case cnt2 is
when "00000"=>ps2data<='1';
when "00001" =>ps2data<='0';
when"00010" =>ps2data<='1';
when "00011" =>ps2data<='1';
when "00100"=>ps2data<='1';
when "00101"=>ps2data<='1';
when "00110"=>ps2data<='0';
when "00111"=>ps2data<='0';
when "01000"=>ps2data<='0';
when "01001"=>ps2data<='0';
when "01010"=>ps2data<='1';
when "01011"=>ps2data<='1';
when"01100" =>ps2data<='0';
when"01101" =>ps2data<=ym_tong2(0);
when "01110" => ps2data<=ym_tong2(1);
when "01111"=>ps2data<=ym_tong2(2);
when "10000"=>ps2data<=ym_tong2(3);
when "10001"=>ps2data<=ym_tong2(4);
when "10010"=>ps2data<=ym_tong2(5);
when "10011"=>ps2data<=ym_tong2(6);
when "10100"=>ps2data<=ym_tong2(7);
when "10101"=>ps2data<=xiaoyan;
when "10110"=>ps2data<='1';
when others => NULL;
end case;
case cnt0 is
when "0000" => ps2data<='1';
when "0001" => ps2data<='0';
when "0010" =>ps2data<=ym_tong1(0);
when "0011" => ps2data<=ym_tong1(1);
when "0100"=>ps2data<=ym_tong1(2);
when "0101"=>ps2data<=ym_tong1(3);
when "0110"=>ps2data<=ym_tong1(4);
when "0111"=>ps2data<=ym_tong1(5);
when "1000"=>ps2data<=ym_tong1(6);
when "1001"=>ps2data<=ym_tong1(7);
when "1010"=>ps2data<=xiaoyan;
when "1011"=>ps2data<='1';
when others => NULL;
end case;
end if;
end process;
end architecture one;

复制代码

这是仿真出来的ps/2时序图

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1条回答

云端CIA

1楼-- · 2019-07-15 22:48

哇好厉害楼主真棒

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